Device Utilization Summary | [-] |
Slice Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Registers |
781 |
4,800 |
16% |
|
Number used as Flip Flops |
781 |
|
|
|
Number used as Latches |
0 |
|
|
|
Number used as Latch-thrus |
0 |
|
|
|
Number used as AND/OR logics |
0 |
|
|
|
Number of Slice LUTs |
1,279 |
2,400 |
53% |
|
Number used as logic |
1,265 |
2,400 |
52% |
|
Number using O6 output only |
1,013 |
|
|
|
Number using O5 output only |
66 |
|
|
|
Number using O5 and O6 |
186 |
|
|
|
Number used as ROM |
0 |
|
|
|
Number used as Memory |
1 |
1,200 |
1% |
|
Number used as Dual Port RAM |
0 |
|
|
|
Number used as Single Port RAM |
0 |
|
|
|
Number used as Shift Register |
1 |
|
|
|
Number using O6 output only |
1 |
|
|
|
Number using O5 output only |
0 |
|
|
|
Number using O5 and O6 |
0 |
|
|
|
Number used exclusively as route-thrus |
13 |
|
|
|
Number with same-slice register load |
10 |
|
|
|
Number with same-slice carry load |
3 |
|
|
|
Number with other load |
0 |
|
|
|
Number of occupied Slices |
456 |
600 |
76% |
|
Number of MUXCYs used |
148 |
1,200 |
12% |
|
Number of LUT Flip Flop pairs used |
1,378 |
|
|
|
Number with an unused Flip Flop |
660 |
1,378 |
47% |
|
Number with an unused LUT |
99 |
1,378 |
7% |
|
Number of fully used LUT-FF pairs |
619 |
1,378 |
44% |
|
Number of unique control sets |
60 |
|
|
|
Number of slice register sites lost to control set restrictions |
178 |
4,800 |
3% |
|
Number of bonded IOBs |
90 |
102 |
88% |
|
Number of LOCed IOBs |
90 |
90 |
100% |
|
IOB Flip Flops |
3 |
|
|
|
IOB Master Pads |
2 |
|
|
|
IOB Slave Pads |
2 |
|
|
|
Number of RAMB16BWERs |
1 |
12 |
8% |
|
Number of RAMB8BWERs |
1 |
24 |
4% |
|
Number of BUFIO2/BUFIO2_2CLKs |
0 |
32 |
0% |
|
Number of BUFIO2FB/BUFIO2FB_2CLKs |
0 |
32 |
0% |
|
Number of BUFG/BUFGMUXs |
4 |
16 |
25% |
|
Number used as BUFGs |
3 |
|
|
|
Number used as BUFGMUX |
1 |
|
|
|
Number of DCM/DCM_CLKGENs |
0 |
4 |
0% |
|
Number of ILOGIC2/ISERDES2s |
1 |
200 |
1% |
|
Number used as ILOGIC2s |
1 |
|
|
|
Number used as ISERDES2s |
0 |
|
|
|
Number of IODELAY2/IODRP2/IODRP2_MCBs |
0 |
200 |
0% |
|
Number of OLOGIC2/OSERDES2s |
3 |
200 |
1% |
|
Number used as OLOGIC2s |
2 |
|
|
|
Number used as OSERDES2s |
1 |
|
|
|
Number of BSCANs |
0 |
4 |
0% |
|
Number of BUFHs |
0 |
128 |
0% |
|
Number of BUFPLLs |
1 |
8 |
12% |
|
Number of BUFPLL_MCBs |
0 |
4 |
0% |
|
Number of DSP48A1s |
0 |
8 |
0% |
|
Number of ICAPs |
0 |
1 |
0% |
|
Number of PCILOGICSEs |
0 |
2 |
0% |
|
Number of PLL_ADVs |
1 |
2 |
50% |
|
Number of PMVs |
0 |
1 |
0% |
|
Number of STARTUPs |
1 |
1 |
100% |
|
Number of SUSPEND_SYNCs |
0 |
1 |
0% |
|
Average Fanout of Non-Clock Nets |
4.12 |
|
|
|