### Equations

acc_fifo_p <= NOT ((NOT ena_fifo_mem_p AND NOT ena_mem_fifo_p));
FTCPE_ena_fifo_mem_p: FTCPE port map (ena_fifo_mem_p,ena_fifo_mem_p_T,clk,reset,'0','1'); ena_fifo_mem_p_T <= ((ena_fifo_mem_p AND mem_done) OR (ena_fifo_mem_p AND NOT db_in(1) AND NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1))
OR (ena_fifo_mem_p AND NOT add(5) AND NOT add(4) AND NOT add(3) AND
NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND db_in(0))
OR (NOT ena_fifo_mem_p AND db_in(1) AND NOT add(5) AND NOT add(4) AND
NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND
NOT db_in(0) AND NOT mem_done));
FDCPE_mem_done: FDCPE port map (mem_done,mem_done_D,clk,reset,'0','1'); mem_done_D <= ((mem_done AND NOT N_PZ_1161) OR (NOT mem_done AND NOT N_PZ_1161 AND mem_done_ev) OR (NOT mem_done AND NOT N_PZ_1161 AND NOT _n0125) OR (NOT mem_done AND NOT N_PZ_1161 AND counter(11) AND
counter(10) AND counter(1) AND counter(0) AND counter(2) AND
counter(3) AND counter(4) AND counter(5) AND counter(6) AND
counter(7) AND counter(8) AND counter(9) AND counter(12) AND
counter(13) AND counter(14) AND counter(15) AND counter(16) AND
counter(17) AND NOT counter(18) AND NOT _n0122 AND ena_fill_mem));
N_PZ_1161 <= (NOT ena_fifo_mem_p AND NOT ena_mem_fifo_p);
FTCPE_ena_mem_fifo_p: FTCPE port map (ena_mem_fifo_p,ena_mem_fifo_p_T,clk,reset,'0','1'); ena_mem_fifo_p_T <= ((mem_done AND ena_mem_fifo_p) OR (add(5) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND NOT state_FFD1 AND NOT state_FFD3)
OR (add(4) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (add(3) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (add(2) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (add(0) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (NOT enw AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (NOT cs AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (add(1) AND NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND
NOT state_FFD1 AND NOT state_FFD3)
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND NOT db_in(0) AND ena_mem_fifo_p)
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(0) AND NOT mem_done AND
NOT ena_mem_fifo_p));
FDCPE_state_FFD2: FDCPE port map (state_FFD2,state_FFD2_D,clk,reset,'0','1'); state_FFD2_D <= NOT (((NOT state_FFD2 AND NOT state_FFD1) OR (NOT state_FFD2 AND state_FFD3) OR (NOT mem_done AND NOT ena_mem_fifo_p AND state_FFD2 AND state_FFD1 AND NOT state_FFD3)
OR (state_FFD1 AND state_FFD3 AND NOT cycle_counter(0) AND
NOT cycle_counter(10) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5) AND
NOT cycle_counter(6) AND NOT cycle_counter(7) AND NOT cycle_counter(8) AND
NOT cycle_counter(9) AND NOT cycle_counter(11) AND NOT cycle_counter(12) AND
NOT cycle_counter(13) AND NOT cycle_counter(14) AND NOT cycle_counter(15))));
FDCPE_state_FFD1: FDCPE port map (state_FFD1,state_FFD1_D,clk,reset,'0','1'); state_FFD1_D <= ((ena_mem_fifo_p AND state_FFD2 AND NOT state_FFD1) OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3) OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3)
OR (NOT mem_done AND ena_mem_fifo_p AND state_FFD1 AND
NOT state_FFD3)
OR (ena_mem_fifo_p AND NOT state_FFD1 AND NOT state_FFD3 AND
ena_cycles));
FDCPE_state_FFD3: FDCPE port map (state_FFD3,state_FFD3_D,clk,reset,'0','1'); state_FFD3_D <= ((state_FFD2 AND NOT state_FFD1 AND state_FFD3) OR (mem_done AND state_FFD2 AND state_FFD1 AND NOT state_FFD3));
FDCPE_ena_cycles: FDCPE port map (ena_cycles,db_in(5),clk,reset,'0',ena_cycles_CE); ena_cycles_CE <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_cycle_counter0: FDCPE port map (cycle_counter(0),cycle_counter_D(0),clk,reset,'0','1'); cycle_counter_D(0) <= ((state_FFD2 AND state_FFD1 AND cycle_counter(0)) OR (NOT state_FFD1 AND NOT state_FFD3 AND cycle_counter(0)) OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
num_cycles(0)));
FDCPE_num_cycles0: FDCPE port map (num_cycles(0),db_in(0),clk,reset,'0',num_cycles_CE(0)); num_cycles_CE(0) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter10: FTCPE port map (cycle_counter(10),cycle_counter_T(10),clk,reset,'0','1'); cycle_counter_T(10) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(10)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(10) AND NOT num_cycles(10))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(10) AND num_cycles(10))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5) AND
NOT cycle_counter(6) AND NOT cycle_counter(7) AND NOT cycle_counter(8) AND
NOT cycle_counter(9)));
FDCPE_num_cycles10: FDCPE port map (num_cycles(10),db_in(10),clk,reset,'0',num_cycles_CE(10)); num_cycles_CE(10) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter1: FTCPE port map (cycle_counter(1),cycle_counter_T(1),clk,reset,'0','1'); cycle_counter_T(1) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(1)) OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND NOT cycle_counter(0)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(1) AND
NOT num_cycles(1))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(1) AND num_cycles(1)));
FDCPE_num_cycles1: FDCPE port map (num_cycles(1),db_in(1),clk,reset,'0',num_cycles_CE(1)); num_cycles_CE(1) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter2: FTCPE port map (cycle_counter(2),cycle_counter_T(2),clk,reset,'0','1'); cycle_counter_T(2) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(2)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(2) AND NOT num_cycles(2))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(2) AND num_cycles(2)));
FDCPE_num_cycles2: FDCPE port map (num_cycles(2),db_in(2),clk,reset,'0',num_cycles_CE(2)); num_cycles_CE(2) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter3: FTCPE port map (cycle_counter(3),cycle_counter_T(3),clk,reset,'0','1'); cycle_counter_T(3) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(3)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(3) AND NOT num_cycles(3))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(3) AND num_cycles(3))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2)));
FDCPE_num_cycles3: FDCPE port map (num_cycles(3),db_in(3),clk,reset,'0',num_cycles_CE(3)); num_cycles_CE(3) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter4: FTCPE port map (cycle_counter(4),cycle_counter_T(4),clk,reset,'0','1'); cycle_counter_T(4) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(4)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(4) AND NOT num_cycles(4))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(4) AND num_cycles(4))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3)));
FDCPE_num_cycles4: FDCPE port map (num_cycles(4),db_in(4),clk,reset,'0',num_cycles_CE(4)); num_cycles_CE(4) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter5: FTCPE port map (cycle_counter(5),cycle_counter_T(5),clk,reset,'0','1'); cycle_counter_T(5) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(5)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(5) AND NOT num_cycles(5))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(5) AND num_cycles(5))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4)));
FDCPE_num_cycles5: FDCPE port map (num_cycles(5),db_in(5),clk,reset,'0',num_cycles_CE(5)); num_cycles_CE(5) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter6: FTCPE port map (cycle_counter(6),cycle_counter_T(6),clk,reset,'0','1'); cycle_counter_T(6) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(6)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(6) AND NOT num_cycles(6))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(6) AND num_cycles(6))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5)));
FDCPE_num_cycles6: FDCPE port map (num_cycles(6),db_in(6),clk,reset,'0',num_cycles_CE(6)); num_cycles_CE(6) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter7: FTCPE port map (cycle_counter(7),cycle_counter_T(7),clk,reset,'0','1'); cycle_counter_T(7) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(7)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(7) AND NOT num_cycles(7))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(7) AND num_cycles(7))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5) AND
NOT cycle_counter(6)));
FDCPE_num_cycles7: FDCPE port map (num_cycles(7),db_in(7),clk,reset,'0',num_cycles_CE(7)); num_cycles_CE(7) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter8: FTCPE port map (cycle_counter(8),cycle_counter_T(8),clk,reset,'0','1'); cycle_counter_T(8) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(8)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(8) AND NOT num_cycles(8))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(8) AND num_cycles(8))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5) AND
NOT cycle_counter(6) AND NOT cycle_counter(7)));
FDCPE_num_cycles8: FDCPE port map (num_cycles(8),db_in(8),clk,reset,'0',num_cycles_CE(8)); num_cycles_CE(8) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter9: FTCPE port map (cycle_counter(9),cycle_counter_T(9),clk,reset,'0','1'); cycle_counter_T(9) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(9)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(9) AND NOT num_cycles(9))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(9) AND num_cycles(9))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(1) AND NOT cycle_counter(2) AND
NOT cycle_counter(3) AND NOT cycle_counter(4) AND NOT cycle_counter(5) AND
NOT cycle_counter(6) AND NOT cycle_counter(7) AND NOT cycle_counter(8)));
FDCPE_num_cycles9: FDCPE port map (num_cycles(9),db_in(9),clk,reset,'0',num_cycles_CE(9)); num_cycles_CE(9) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter11: FTCPE port map (cycle_counter(11),cycle_counter_T(11),clk,reset,'0','1'); cycle_counter_T(11) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(11)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(11) AND NOT num_cycles(11))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(11) AND num_cycles(11))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(10) AND NOT cycle_counter(1) AND
NOT cycle_counter(2) AND NOT cycle_counter(3) AND NOT cycle_counter(4) AND
NOT cycle_counter(5) AND NOT cycle_counter(6) AND NOT cycle_counter(7) AND
NOT cycle_counter(8) AND NOT cycle_counter(9)));
FDCPE_num_cycles11: FDCPE port map (num_cycles(11),db_in(11),clk,reset,'0',num_cycles_CE(11)); num_cycles_CE(11) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter12: FTCPE port map (cycle_counter(12),cycle_counter_T(12),clk,reset,'0','1'); cycle_counter_T(12) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(12)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(12) AND NOT num_cycles(12))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(12) AND num_cycles(12))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(10) AND NOT cycle_counter(1) AND
NOT cycle_counter(2) AND NOT cycle_counter(3) AND NOT cycle_counter(4) AND
NOT cycle_counter(5) AND NOT cycle_counter(6) AND NOT cycle_counter(7) AND
NOT cycle_counter(8) AND NOT cycle_counter(9) AND NOT cycle_counter(11)));
FDCPE_num_cycles12: FDCPE port map (num_cycles(12),db_in(12),clk,reset,'0',num_cycles_CE(12)); num_cycles_CE(12) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter13: FTCPE port map (cycle_counter(13),cycle_counter_T(13),clk,reset,'0','1'); cycle_counter_T(13) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(13)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(13) AND NOT num_cycles(13))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(13) AND num_cycles(13))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(10) AND NOT cycle_counter(1) AND
NOT cycle_counter(2) AND NOT cycle_counter(3) AND NOT cycle_counter(4) AND
NOT cycle_counter(5) AND NOT cycle_counter(6) AND NOT cycle_counter(7) AND
NOT cycle_counter(8) AND NOT cycle_counter(9) AND NOT cycle_counter(11) AND
NOT cycle_counter(12)));
FDCPE_num_cycles13: FDCPE port map (num_cycles(13),db_in(13),clk,reset,'0',num_cycles_CE(13)); num_cycles_CE(13) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter14: FTCPE port map (cycle_counter(14),cycle_counter_T(14),clk,reset,'0','1'); cycle_counter_T(14) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(14)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(14) AND NOT num_cycles(14))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(14) AND num_cycles(14))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(10) AND NOT cycle_counter(1) AND
NOT cycle_counter(2) AND NOT cycle_counter(3) AND NOT cycle_counter(4) AND
NOT cycle_counter(5) AND NOT cycle_counter(6) AND NOT cycle_counter(7) AND
NOT cycle_counter(8) AND NOT cycle_counter(9) AND NOT cycle_counter(11) AND
NOT cycle_counter(12) AND NOT cycle_counter(13)));
FDCPE_num_cycles14: FDCPE port map (num_cycles(14),db_in(14),clk,reset,'0',num_cycles_CE(14)); num_cycles_CE(14) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FTCPE_cycle_counter15: FTCPE port map (cycle_counter(15),cycle_counter_T(15),clk,reset,'0','1'); cycle_counter_T(15) <= ((NOT state_FFD2 AND state_FFD3 AND cycle_counter(15)) OR (NOT state_FFD2 AND state_FFD1 AND cycle_counter(15) AND NOT num_cycles(15))
OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3 AND
NOT cycle_counter(15) AND num_cycles(15))
OR (state_FFD2 AND NOT state_FFD1 AND state_FFD3 AND
NOT cycle_counter(0) AND NOT cycle_counter(10) AND NOT cycle_counter(1) AND
NOT cycle_counter(2) AND NOT cycle_counter(3) AND NOT cycle_counter(4) AND
NOT cycle_counter(5) AND NOT cycle_counter(6) AND NOT cycle_counter(7) AND
NOT cycle_counter(8) AND NOT cycle_counter(9) AND NOT cycle_counter(11) AND
NOT cycle_counter(12) AND NOT cycle_counter(13) AND NOT cycle_counter(14)));
FDCPE_num_cycles15: FDCPE port map (num_cycles(15),db_in(15),clk,reset,'0',num_cycles_CE(15)); num_cycles_CE(15) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND add(1));
FDCPE_mem_done_ev: FDCPE port map (mem_done_ev,mem_done_ev_D,clk,reset,'0','1'); mem_done_ev_D <= ((mem_done_ev AND NOT _n0121) OR (NOT N_PZ_1161 AND mem_done2 AND _n0121));
FDCPE_mem_done2: FDCPE port map (mem_done2,mem_done2_D,clk,reset,'0','1'); mem_done2_D <= ((NOT N_PZ_1161 AND mem_done2) OR (NOT N_PZ_1161 AND NOT mem_done_ev AND NOT mem_done2 AND _n0125 AND _n0122));
_n0125 <= ((NOT ena_word_count) OR (Mcompar__n0095__n0015) OR (counter(11) AND NOT mword_count(10)) OR (NOT counter(11) AND mword_count(10)) OR (counter(10) AND NOT mword_count(9))
OR (NOT counter(10) AND mword_count(9))
OR (counter(5) AND NOT mword_count(4))
OR (NOT counter(5) AND mword_count(4))
OR (counter(6) AND NOT mword_count(5))
OR (NOT counter(6) AND mword_count(5))
OR (counter(7) AND NOT mword_count(6))
OR (NOT counter(7) AND mword_count(6))
OR (counter(8) AND NOT mword_count(7))
OR (NOT counter(8) AND mword_count(7))
OR (counter(9) AND NOT mword_count(8))
OR (NOT counter(9) AND mword_count(8))
OR (counter(12) AND NOT mword_count(11))
OR (NOT counter(12) AND mword_count(11)));
FDCPE_ena_word_count: FDCPE port map (ena_word_count,db_in(2),clk,reset,'0',ena_word_count_CE); ena_word_count_CE <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FTCPE_counter11: FTCPE port map (counter(11),counter_T(11),clk,reset,'0','1'); counter_T(11) <= ((N_PZ_1161 AND counter(11) AND _n0121) OR (NOT N_PZ_1161 AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND
counter(5) AND counter(6) AND counter(7) AND counter(8) AND
counter(9)));
_n0121 <= ((N_PZ_1161) OR (ena_word_count AND N_PZ_1265) OR (is_trigger AND ena_event_count));
FDCPE_ena_event_count: FDCPE port map (ena_event_count,db_in(3),clk,reset,'0',ena_event_count_CE); ena_event_count_CE <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
N_PZ_1265 <= ((ena_mem_fifo_p AND txena_out_p) OR (NOT ena_mem_fifo_p AND txena_in));
FDCPE_txena_out_p: FDCPE port map (txena_out_p,txena_out_p_D,clk,reset,'0','1'); txena_out_p_D <= ((ena_mem_fifo_p AND _n0125 AND NOT txena_out_p AND NOT ena_random) OR (ena_mem_fifo_p AND _n0125 AND ena_random AND ena_lfsr(0) AND lfsr_0(40))
OR (ena_mem_fifo_p AND _n0125 AND ena_random AND
ena_lfsr(1) AND lfsr_1(30))
OR (ena_mem_fifo_p AND _n0125 AND ena_random AND
ena_lfsr(2) AND lfsr_2(20))
OR (ena_mem_fifo_p AND _n0125 AND ena_random AND
ena_lfsr(3) AND lfsr_3(10)));
FDCPE_ena_random: FDCPE port map (ena_random,db_in(6),clk,reset,'0',ena_random_CE); ena_random_CE <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_ena_lfsr0: FDCPE port map (ena_lfsr(0),db_in(7),clk,reset,'0',ena_lfsr_CE(0)); ena_lfsr_CE(0) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_lfsr_040: FDCPE port map (lfsr_0(40),lfsr_0(39),clk,reset,'0','1');
FDCPE_lfsr_039: FDCPE port map (lfsr_0(39),lfsr_0(38),clk,reset,'0','1');
FDCPE_lfsr_038: FDCPE port map (lfsr_0(38),lfsr_0(37),clk,reset,'0','1');
FDCPE_lfsr_037: FDCPE port map (lfsr_0(37),lfsr_0(36),clk,reset,'0','1');
FDCPE_lfsr_036: FDCPE port map (lfsr_0(36),lfsr_0(35),clk,reset,'0','1');
FDCPE_lfsr_035: FDCPE port map (lfsr_0(35),lfsr_0(34),clk,reset,'0','1');
FDCPE_lfsr_034: FDCPE port map (lfsr_0(34),lfsr_0(33),clk,reset,'0','1');
FDCPE_lfsr_033: FDCPE port map (lfsr_0(33),lfsr_0(32),clk,reset,'0','1');
FDCPE_lfsr_032: FDCPE port map (lfsr_0(32),lfsr_0(31),clk,reset,'0','1');
FDCPE_lfsr_031: FDCPE port map (lfsr_0(31),lfsr_0(30),clk,reset,'0','1');
FDCPE_lfsr_030: FDCPE port map (lfsr_0(30),lfsr_0(29),clk,reset,'0','1');
FDCPE_lfsr_029: FDCPE port map (lfsr_0(29),lfsr_0(28),clk,reset,'0','1');
FDCPE_lfsr_028: FDCPE port map (lfsr_0(28),lfsr_0(27),clk,reset,'0','1');
FDCPE_lfsr_027: FDCPE port map (lfsr_0(27),lfsr_0(26),clk,reset,'0','1');
FDCPE_lfsr_026: FDCPE port map (lfsr_0(26),lfsr_0(25),clk,reset,'0','1');
FDCPE_lfsr_025: FDCPE port map (lfsr_0(25),lfsr_0(24),clk,reset,'0','1');
FDCPE_lfsr_024: FDCPE port map (lfsr_0(24),lfsr_0(23),clk,reset,'0','1');
FDCPE_lfsr_023: FDCPE port map (lfsr_0(23),lfsr_0(22),clk,reset,'0','1');
FDCPE_lfsr_022: FDCPE port map (lfsr_0(22),lfsr_0(21),clk,reset,'0','1');
FDCPE_lfsr_021: FDCPE port map (lfsr_0(21),lfsr_0(20),clk,reset,'0','1');
FDCPE_lfsr_020: FDCPE port map (lfsr_0(20),lfsr_0(19),clk,reset,'0','1');
FDCPE_lfsr_019: FDCPE port map (lfsr_0(19),lfsr_0(18),clk,reset,'0','1');
FDCPE_lfsr_018: FDCPE port map (lfsr_0(18),lfsr_0(17),clk,reset,'0','1');
FDCPE_lfsr_017: FDCPE port map (lfsr_0(17),lfsr_0(16),clk,reset,'0','1');
FDCPE_lfsr_016: FDCPE port map (lfsr_0(16),lfsr_0(15),clk,reset,'0','1');
FDCPE_lfsr_015: FDCPE port map (lfsr_0(15),lfsr_0(14),clk,reset,'0','1');
FDCPE_lfsr_014: FDCPE port map (lfsr_0(14),lfsr_0(13),clk,reset,'0','1');
FDCPE_lfsr_013: FDCPE port map (lfsr_0(13),lfsr_0(12),clk,reset,'0','1');
FDCPE_lfsr_012: FDCPE port map (lfsr_0(12),lfsr_0(11),clk,reset,'0','1');
FDCPE_lfsr_011: FDCPE port map (lfsr_0(11),lfsr_0(10),clk,reset,'0','1');
FDCPE_lfsr_010: FDCPE port map (lfsr_0(10),lfsr_0(9),clk,reset,'0','1');
FDCPE_lfsr_09: FDCPE port map (lfsr_0(9),lfsr_0(8),clk,reset,'0','1');
FDCPE_lfsr_08: FDCPE port map (lfsr_0(8),lfsr_0(7),clk,reset,'0','1');
FDCPE_lfsr_07: FDCPE port map (lfsr_0(7),lfsr_0(6),clk,reset,'0','1');
FDCPE_lfsr_06: FDCPE port map (lfsr_0(6),lfsr_0(5),clk,reset,'0','1');
FDCPE_lfsr_05: FDCPE port map (lfsr_0(5),lfsr_0(4),clk,reset,'0','1');
FDCPE_lfsr_04: FDCPE port map (lfsr_0(4),lfsr_0(3),clk,reset,'0','1');
FDCPE_lfsr_03: FDCPE port map (lfsr_0(3),lfsr_0(2),clk,reset,'0','1');
FDCPE_lfsr_02: FDCPE port map (lfsr_0(2),lfsr_0(1),clk,reset,'0','1');
FDCPE_lfsr_01: FDCPE port map (lfsr_0(1),lfsr_0(0),clk,reset,'0','1');
FDCPE_lfsr_00: FDCPE port map (lfsr_0(0),lfsr_0_D(0),clk,reset,'0','1'); lfsr_0_D(0) <= ((lfsr_0(40) AND lfsr_0(37)) OR (NOT lfsr_0(40) AND NOT lfsr_0(37)));
FDCPE_ena_lfsr1: FDCPE port map (ena_lfsr(1),db_in(8),clk,reset,'0',ena_lfsr_CE(1)); ena_lfsr_CE(1) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_lfsr_130: FDCPE port map (lfsr_1(30),lfsr_1(29),clk,reset,'0','1');
FDCPE_lfsr_129: FDCPE port map (lfsr_1(29),lfsr_1(28),clk,reset,'0','1');
FDCPE_lfsr_128: FDCPE port map (lfsr_1(28),lfsr_1(27),clk,reset,'0','1');
FDCPE_lfsr_127: FDCPE port map (lfsr_1(27),lfsr_1(26),clk,reset,'0','1');
FDCPE_lfsr_126: FDCPE port map (lfsr_1(26),lfsr_1(25),clk,reset,'0','1');
FDCPE_lfsr_125: FDCPE port map (lfsr_1(25),lfsr_1(24),clk,reset,'0','1');
FDCPE_lfsr_124: FDCPE port map (lfsr_1(24),lfsr_1(23),clk,reset,'0','1');
FDCPE_lfsr_123: FDCPE port map (lfsr_1(23),lfsr_1(22),clk,reset,'0','1');
FDCPE_lfsr_122: FDCPE port map (lfsr_1(22),lfsr_1(21),clk,reset,'0','1');
FDCPE_lfsr_121: FDCPE port map (lfsr_1(21),lfsr_1(20),clk,reset,'0','1');
FDCPE_lfsr_120: FDCPE port map (lfsr_1(20),lfsr_1(19),clk,reset,'0','1');
FDCPE_lfsr_119: FDCPE port map (lfsr_1(19),lfsr_1(18),clk,reset,'0','1');
FDCPE_lfsr_118: FDCPE port map (lfsr_1(18),lfsr_1(17),clk,reset,'0','1');
FDCPE_lfsr_117: FDCPE port map (lfsr_1(17),lfsr_1(16),clk,reset,'0','1');
FDCPE_lfsr_116: FDCPE port map (lfsr_1(16),lfsr_1(15),clk,reset,'0','1');
FDCPE_lfsr_115: FDCPE port map (lfsr_1(15),lfsr_1(14),clk,reset,'0','1');
FDCPE_lfsr_114: FDCPE port map (lfsr_1(14),lfsr_1(13),clk,reset,'0','1');
FDCPE_lfsr_113: FDCPE port map (lfsr_1(13),lfsr_1(12),clk,reset,'0','1');
FDCPE_lfsr_112: FDCPE port map (lfsr_1(12),lfsr_1(11),clk,reset,'0','1');
FDCPE_lfsr_111: FDCPE port map (lfsr_1(11),lfsr_1(10),clk,reset,'0','1');
FDCPE_lfsr_110: FDCPE port map (lfsr_1(10),lfsr_1(9),clk,reset,'0','1');
FDCPE_lfsr_19: FDCPE port map (lfsr_1(9),lfsr_1(8),clk,reset,'0','1');
FDCPE_lfsr_18: FDCPE port map (lfsr_1(8),lfsr_1(7),clk,reset,'0','1');
FDCPE_lfsr_17: FDCPE port map (lfsr_1(7),lfsr_1(6),clk,reset,'0','1');
FDCPE_lfsr_16: FDCPE port map (lfsr_1(6),lfsr_1(5),clk,reset,'0','1');
FDCPE_lfsr_15: FDCPE port map (lfsr_1(5),lfsr_1(4),clk,reset,'0','1');
FDCPE_lfsr_14: FDCPE port map (lfsr_1(4),lfsr_1(3),clk,reset,'0','1');
FDCPE_lfsr_13: FDCPE port map (lfsr_1(3),lfsr_1(2),clk,reset,'0','1');
FDCPE_lfsr_12: FDCPE port map (lfsr_1(2),lfsr_1(1),clk,reset,'0','1');
FDCPE_lfsr_11: FDCPE port map (lfsr_1(1),lfsr_1(0),clk,reset,'0','1');
FDCPE_lfsr_10: FDCPE port map (lfsr_1(0),lfsr_1_D(0),clk,reset,'0','1'); lfsr_1_D(0) <= ((lfsr_1(30) AND lfsr_1(27)) OR (NOT lfsr_1(30) AND NOT lfsr_1(27)));
FDCPE_ena_lfsr2: FDCPE port map (ena_lfsr(2),db_in(9),clk,reset,'0',ena_lfsr_CE(2)); ena_lfsr_CE(2) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_lfsr_220: FDCPE port map (lfsr_2(20),lfsr_2(19),clk,reset,'0','1');
FDCPE_lfsr_219: FDCPE port map (lfsr_2(19),lfsr_2(18),clk,reset,'0','1');
FDCPE_lfsr_218: FDCPE port map (lfsr_2(18),lfsr_2(17),clk,reset,'0','1');
FDCPE_lfsr_217: FDCPE port map (lfsr_2(17),lfsr_2(16),clk,reset,'0','1');
FDCPE_lfsr_216: FDCPE port map (lfsr_2(16),lfsr_2(15),clk,reset,'0','1');
FDCPE_lfsr_215: FDCPE port map (lfsr_2(15),lfsr_2(14),clk,reset,'0','1');
FDCPE_lfsr_214: FDCPE port map (lfsr_2(14),lfsr_2(13),clk,reset,'0','1');
FDCPE_lfsr_213: FDCPE port map (lfsr_2(13),lfsr_2(12),clk,reset,'0','1');
FDCPE_lfsr_212: FDCPE port map (lfsr_2(12),lfsr_2(11),clk,reset,'0','1');
FDCPE_lfsr_211: FDCPE port map (lfsr_2(11),lfsr_2(10),clk,reset,'0','1');
FDCPE_lfsr_210: FDCPE port map (lfsr_2(10),lfsr_2(9),clk,reset,'0','1');
FDCPE_lfsr_29: FDCPE port map (lfsr_2(9),lfsr_2(8),clk,reset,'0','1');
FDCPE_lfsr_28: FDCPE port map (lfsr_2(8),lfsr_2(7),clk,reset,'0','1');
FDCPE_lfsr_27: FDCPE port map (lfsr_2(7),lfsr_2(6),clk,reset,'0','1');
FDCPE_lfsr_26: FDCPE port map (lfsr_2(6),lfsr_2(5),clk,reset,'0','1');
FDCPE_lfsr_25: FDCPE port map (lfsr_2(5),lfsr_2(4),clk,reset,'0','1');
FDCPE_lfsr_24: FDCPE port map (lfsr_2(4),lfsr_2(3),clk,reset,'0','1');
FDCPE_lfsr_23: FDCPE port map (lfsr_2(3),lfsr_2(2),clk,reset,'0','1');
FDCPE_lfsr_22: FDCPE port map (lfsr_2(2),lfsr_2(1),clk,reset,'0','1');
FDCPE_lfsr_21: FDCPE port map (lfsr_2(1),lfsr_2(0),clk,reset,'0','1');
FDCPE_lfsr_20: FDCPE port map (lfsr_2(0),lfsr_2_D(0),clk,reset,'0','1'); lfsr_2_D(0) <= ((lfsr_2(20) AND lfsr_2(18)) OR (NOT lfsr_2(20) AND NOT lfsr_2(18)));
FDCPE_ena_lfsr3: FDCPE port map (ena_lfsr(3),db_in(10),clk,reset,'0',ena_lfsr_CE(3)); ena_lfsr_CE(3) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
FDCPE_lfsr_310: FDCPE port map (lfsr_3(10),lfsr_3(9),clk,reset,'0','1');
FDCPE_lfsr_39: FDCPE port map (lfsr_3(9),lfsr_3(8),clk,reset,'0','1');
FDCPE_lfsr_38: FDCPE port map (lfsr_3(8),lfsr_3(7),clk,reset,'0','1');
FDCPE_lfsr_37: FDCPE port map (lfsr_3(7),lfsr_3(6),clk,reset,'0','1');
FDCPE_lfsr_36: FDCPE port map (lfsr_3(6),lfsr_3(5),clk,reset,'0','1');
FDCPE_lfsr_35: FDCPE port map (lfsr_3(5),lfsr_3(4),clk,reset,'0','1');
FDCPE_lfsr_34: FDCPE port map (lfsr_3(4),lfsr_3(3),clk,reset,'0','1');
FDCPE_lfsr_33: FDCPE port map (lfsr_3(3),lfsr_3(2),clk,reset,'0','1');
FDCPE_lfsr_32: FDCPE port map (lfsr_3(2),lfsr_3(1),clk,reset,'0','1');
FDCPE_lfsr_31: FDCPE port map (lfsr_3(1),lfsr_3(0),clk,reset,'0','1');
FDCPE_lfsr_30: FDCPE port map (lfsr_3(0),lfsr_3_D(0),clk,reset,'0','1'); lfsr_3_D(0) <= ((lfsr_3(10) AND lfsr_3(8)) OR (NOT lfsr_3(10) AND NOT lfsr_3(8)));
FTCPE_counter10: FTCPE port map (counter(10),counter_T(10),clk,reset,'0','1'); counter_T(10) <= ((N_PZ_1161 AND _n0121 AND counter(10)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND counter(5) AND
counter(6) AND counter(7) AND counter(8) AND counter(9)));
FTCPE_counter1: FTCPE port map (counter(1),counter_T(1),clk,reset,'0','1'); counter_T(1) <= ((N_PZ_1161 AND _n0121 AND counter(1)) OR (NOT N_PZ_1161 AND _n0121 AND counter(0)));
FDCPE_counter0: FDCPE port map (counter(0),counter_D(0),clk,reset,'0','1'); counter_D(0) <= ((NOT _n0121 AND counter(0)) OR (NOT N_PZ_1161 AND _n0121 AND NOT counter(0)));
FTCPE_counter2: FTCPE port map (counter(2),counter_T(2),clk,reset,'0','1'); counter_T(2) <= ((N_PZ_1161 AND _n0121 AND counter(2)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0)));
FTCPE_counter3: FTCPE port map (counter(3),counter_T(3),clk,reset,'0','1'); counter_T(3) <= ((N_PZ_1161 AND _n0121 AND counter(3)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2)));
FTCPE_counter4: FTCPE port map (counter(4),counter_T(4),clk,reset,'0','1'); counter_T(4) <= ((N_PZ_1161 AND _n0121 AND counter(4)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3)));
FTCPE_counter5: FTCPE port map (counter(5),counter_T(5),clk,reset,'0','1'); counter_T(5) <= ((N_PZ_1161 AND _n0121 AND counter(5)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4)));
FTCPE_counter6: FTCPE port map (counter(6),counter_T(6),clk,reset,'0','1'); counter_T(6) <= ((N_PZ_1161 AND _n0121 AND counter(6)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND counter(5)));
FTCPE_counter7: FTCPE port map (counter(7),counter_T(7),clk,reset,'0','1'); counter_T(7) <= ((N_PZ_1161 AND _n0121 AND counter(7)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND counter(5) AND
counter(6)));
FTCPE_counter8: FTCPE port map (counter(8),counter_T(8),clk,reset,'0','1'); counter_T(8) <= ((N_PZ_1161 AND _n0121 AND counter(8)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND counter(5) AND
counter(6) AND counter(7)));
FTCPE_counter9: FTCPE port map (counter(9),counter_T(9),clk,reset,'0','1'); counter_T(9) <= ((N_PZ_1161 AND _n0121 AND counter(9)) OR (NOT N_PZ_1161 AND _n0121 AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND counter(4) AND counter(5) AND
counter(6) AND counter(7) AND counter(8)));
FDCPE_mword_count10: FDCPE port map (mword_count(10),mword_count_D(10),clk,reset,'0','1'); mword_count_D(10) <= NOT (((NOT db_in(10) AND N_PZ_1149) OR (NOT mword_count(10) AND NOT N_PZ_1149) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
N_PZ_1149 <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND enw AND cs AND add(1));
FTCPE_counter12: FTCPE port map (counter(12),counter_T(12),clk,reset,'0','1'); counter_T(12) <= ((N_PZ_1161 AND _n0121 AND counter(12)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9)));
FDCPE_mword_count11: FDCPE port map (mword_count(11),mword_count_D(11),clk,reset,'0','1'); mword_count_D(11) <= NOT (((NOT db_in(11) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(11)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count4: FDCPE port map (mword_count(4),mword_count_D(4),clk,reset,'0','1'); mword_count_D(4) <= NOT (((NOT db_in(4) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(4)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count5: FDCPE port map (mword_count(5),mword_count_D(5),clk,reset,'0','1'); mword_count_D(5) <= NOT (((NOT db_in(5) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(5)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count6: FDCPE port map (mword_count(6),mword_count_D(6),clk,reset,'0','1'); mword_count_D(6) <= NOT (((NOT db_in(6) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(6)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count7: FDCPE port map (mword_count(7),mword_count_D(7),clk,reset,'0','1'); mword_count_D(7) <= NOT (((NOT db_in(7) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(7)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count8: FDCPE port map (mword_count(8),mword_count_D(8),clk,reset,'0','1'); mword_count_D(8) <= NOT (((NOT db_in(8) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(8)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count9: FDCPE port map (mword_count(9),mword_count_D(9),clk,reset,'0','1'); mword_count_D(9) <= NOT (((NOT db_in(9) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(9)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
Mcompar__n0095__n0015 <= ((counter(1) AND NOT mword_count(0)) OR (NOT counter(1) AND mword_count(0)) OR (counter(2) AND NOT mword_count(1)) OR (NOT counter(2) AND mword_count(1)) OR (counter(3) AND NOT mword_count(2))
OR (NOT counter(3) AND mword_count(2))
OR (counter(4) AND NOT mword_count(3))
OR (NOT counter(4) AND mword_count(3))
OR (counter(13) AND NOT mword_count(12))
OR (NOT counter(13) AND mword_count(12))
OR (counter(14) AND NOT mword_count(13))
OR (NOT counter(14) AND mword_count(13))
OR (counter(15) AND NOT mword_count(14))
OR (NOT counter(15) AND mword_count(14))
OR (counter(16) AND NOT mword_count(15))
OR (NOT counter(16) AND mword_count(15))
OR (counter(17) AND NOT mword_count(16))
OR (NOT counter(17) AND mword_count(16))
OR (counter(18) AND NOT mword_count(17))
OR (NOT counter(18) AND mword_count(17)));
FDCPE_mword_count0: FDCPE port map (mword_count(0),mword_count_D(0),clk,reset,'0','1'); mword_count_D(0) <= NOT (((NOT db_in(0) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(0)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FTCPE_counter13: FTCPE port map (counter(13),counter_T(13),clk,reset,'0','1'); counter_T(13) <= ((N_PZ_1161 AND _n0121 AND counter(13)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12)));
FDCPE_mword_count12: FDCPE port map (mword_count(12),mword_count_D(12),clk,reset,'0','1'); mword_count_D(12) <= NOT (((NOT db_in(12) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(12)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FTCPE_counter14: FTCPE port map (counter(14),counter_T(14),clk,reset,'0','1'); counter_T(14) <= ((N_PZ_1161 AND _n0121 AND counter(14)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12) AND counter(13)));
FDCPE_mword_count13: FDCPE port map (mword_count(13),mword_count_D(13),clk,reset,'0','1'); mword_count_D(13) <= NOT (((NOT db_in(13) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(13)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FTCPE_counter15: FTCPE port map (counter(15),counter_T(15),clk,reset,'0','1'); counter_T(15) <= ((N_PZ_1161 AND _n0121 AND counter(15)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12) AND counter(13) AND
counter(14)));
FDCPE_mword_count14: FDCPE port map (mword_count(14),mword_count_D(14),clk,reset,'0','1'); mword_count_D(14) <= NOT (((NOT db_in(14) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(14)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FTCPE_counter16: FTCPE port map (counter(16),counter_T(16),clk,reset,'0','1'); counter_T(16) <= ((N_PZ_1161 AND _n0121 AND counter(16)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12) AND counter(13) AND
counter(14) AND counter(15)));
FDCPE_mword_count15: FDCPE port map (mword_count(15),mword_count_D(15),clk,reset,'0','1'); mword_count_D(15) <= NOT (((NOT db_in(15) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(15)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FTCPE_counter17: FTCPE port map (counter(17),counter_T(17),clk,reset,'0','1'); counter_T(17) <= ((N_PZ_1161 AND _n0121 AND counter(17)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12) AND counter(13) AND
counter(14) AND counter(15) AND counter(16)));
FTCPE_mword_count16: FTCPE port map (mword_count(16),mword_count_T(16),clk,reset,'0','1'); mword_count_T(16) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT db_in(0) AND mword_count(16))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2) AND mword_count(16))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(0) AND NOT db_in(2) AND
NOT mword_count(16)));
FTCPE_counter18: FTCPE port map (counter(18),counter_T(18),clk,reset,'0','1'); counter_T(18) <= ((N_PZ_1161 AND _n0121 AND counter(18)) OR (NOT N_PZ_1161 AND counter(11) AND _n0121 AND counter(10) AND counter(1) AND counter(0) AND counter(2) AND counter(3) AND
counter(4) AND counter(5) AND counter(6) AND counter(7) AND
counter(8) AND counter(9) AND counter(12) AND counter(13) AND
counter(14) AND counter(15) AND counter(16) AND counter(17)));
FTCPE_mword_count17: FTCPE port map (mword_count(17),mword_count_T(17),clk,reset,'0','1'); mword_count_T(17) <= ((NOT db_in(1) AND NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND mword_count(17))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2) AND mword_count(17))
OR (db_in(1) AND NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND
NOT add(0) AND enw AND cs AND NOT add(1) AND NOT db_in(2) AND NOT mword_count(17)));
FDCPE_mword_count1: FDCPE port map (mword_count(1),mword_count_D(1),clk,reset,'0','1'); mword_count_D(1) <= NOT (((NOT db_in(1) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(1)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count2: FDCPE port map (mword_count(2),mword_count_D(2),clk,reset,'0','1'); mword_count_D(2) <= NOT (((NOT db_in(2) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(2)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
FDCPE_mword_count3: FDCPE port map (mword_count(3),mword_count_D(3),clk,reset,'0','1'); mword_count_D(3) <= NOT (((NOT db_in(3) AND N_PZ_1149) OR (NOT N_PZ_1149 AND NOT mword_count(3)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
enw AND cs AND NOT add(1) AND db_in(2))));
_n0122 <= (ena_event_count AND NOT SFDecomp_15 AND NOT SFDecomp_164 AND NOT SFDecomp_163 AND NOT SFDecomp_174 AND NOT SFDecomp_173 AND NOT SFDecomp_184 AND NOT SFDecomp_183 AND NOT SFDecomp_193 AND NOT SFDecomp_194 AND NOT SFDecomp_203 AND NOT SFDecomp_204 AND NOT SFDecomp_215 AND NOT SFDecomp_216 AND NOT SFDecomp_224 AND
NOT SFDecomp_223 AND NOT SFDecomp_234 AND NOT SFDecomp_233 AND NOT SFDecomp_244 AND
NOT SFDecomp_243 AND NOT SFDecomp_253 AND NOT SFDecomp_254 AND NOT SFDecomp_264 AND
NOT SFDecomp_263 AND NOT SFDecomp_274 AND NOT SFDecomp_273 AND NOT SFDecomp_284 AND
NOT SFDecomp_283 AND NOT SFDecomp_294 AND NOT SFDecomp_293 AND
NOT Mcompar__n0096_ANEB3 AND NOT Mcompar__n0096_ANEB2);
SFDecomp_15 <= ((counter(0) AND NOT mevent_count(0)) OR (NOT counter(0) AND mevent_count(0)));
FDCPE_mevent_count0: FDCPE port map (mevent_count(0),db_in(0),clk,reset,'0',mevent_count_CE(0)); mevent_count_CE(0) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_164 <= (counter(1) AND NOT mevent_count(1));
FDCPE_mevent_count1: FDCPE port map (mevent_count(1),db_in(1),clk,reset,'0',mevent_count_CE(1)); mevent_count_CE(1) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_163 <= (NOT counter(1) AND mevent_count(1));
SFDecomp_174 <= (counter(15) AND NOT mevent_count(15));
FDCPE_mevent_count15: FDCPE port map (mevent_count(15),db_in(15),clk,reset,'0',mevent_count_CE(15)); mevent_count_CE(15) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_173 <= (NOT counter(15) AND mevent_count(15));
SFDecomp_184 <= (counter(2) AND NOT mevent_count(2));
FDCPE_mevent_count2: FDCPE port map (mevent_count(2),db_in(2),clk,reset,'0',mevent_count_CE(2)); mevent_count_CE(2) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_183 <= (NOT counter(2) AND mevent_count(2));
SFDecomp_193 <= (counter(14) AND NOT mevent_count(14));
FDCPE_mevent_count14: FDCPE port map (mevent_count(14),db_in(14),clk,reset,'0',mevent_count_CE(14)); mevent_count_CE(14) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_194 <= (NOT counter(14) AND mevent_count(14));
SFDecomp_203 <= (counter(4) AND NOT mevent_count(4));
FDCPE_mevent_count4: FDCPE port map (mevent_count(4),db_in(4),clk,reset,'0',mevent_count_CE(4)); mevent_count_CE(4) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_204 <= (NOT counter(4) AND mevent_count(4));
SFDecomp_215 <= (counter(12) AND NOT mevent_count(12));
FDCPE_mevent_count12: FDCPE port map (mevent_count(12),db_in(12),clk,reset,'0',mevent_count_CE(12)); mevent_count_CE(12) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_216 <= (NOT counter(12) AND mevent_count(12));
SFDecomp_224 <= (counter(6) AND NOT mevent_count(6));
FDCPE_mevent_count6: FDCPE port map (mevent_count(6),db_in(6),clk,reset,'0',mevent_count_CE(6)); mevent_count_CE(6) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_223 <= (NOT counter(6) AND mevent_count(6));
SFDecomp_234 <= (counter(5) AND NOT mevent_count(5));
FDCPE_mevent_count5: FDCPE port map (mevent_count(5),db_in(5),clk,reset,'0',mevent_count_CE(5)); mevent_count_CE(5) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_233 <= (NOT counter(5) AND mevent_count(5));
SFDecomp_244 <= (counter(3) AND NOT mevent_count(3));
FDCPE_mevent_count3: FDCPE port map (mevent_count(3),db_in(3),clk,reset,'0',mevent_count_CE(3)); mevent_count_CE(3) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_243 <= (NOT counter(3) AND mevent_count(3));
SFDecomp_253 <= (counter(13) AND NOT mevent_count(13));
FDCPE_mevent_count13: FDCPE port map (mevent_count(13),db_in(13),clk,reset,'0',mevent_count_CE(13)); mevent_count_CE(13) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_254 <= (NOT counter(13) AND mevent_count(13));
SFDecomp_264 <= (counter(8) AND NOT mevent_count(8));
FDCPE_mevent_count8: FDCPE port map (mevent_count(8),db_in(8),clk,reset,'0',mevent_count_CE(8)); mevent_count_CE(8) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_263 <= (NOT counter(8) AND mevent_count(8));
SFDecomp_274 <= (counter(7) AND NOT mevent_count(7));
FDCPE_mevent_count7: FDCPE port map (mevent_count(7),db_in(7),clk,reset,'0',mevent_count_CE(7)); mevent_count_CE(7) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_273 <= (NOT counter(7) AND mevent_count(7));
SFDecomp_284 <= (counter(10) AND NOT mevent_count(10));
FDCPE_mevent_count10: FDCPE port map (mevent_count(10),db_in(10),clk,reset,'0',mevent_count_CE(10)); mevent_count_CE(10) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_283 <= (NOT counter(10) AND mevent_count(10));
SFDecomp_294 <= (counter(9) AND NOT mevent_count(9));
FDCPE_mevent_count9: FDCPE port map (mevent_count(9),db_in(9),clk,reset,'0',mevent_count_CE(9)); mevent_count_CE(9) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
SFDecomp_293 <= (NOT counter(9) AND mevent_count(9));
Mcompar__n0096_ANEB3 <= (counter(11) AND NOT mevent_count(11));
FDCPE_mevent_count11: FDCPE port map (mevent_count(11),db_in(11),clk,reset,'0',mevent_count_CE(11)); mevent_count_CE(11) <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND enw AND cs AND NOT add(1));
Mcompar__n0096_ANEB2 <= (NOT counter(11) AND mevent_count(11));
FDCPE_ena_fill_mem: FDCPE port map (ena_fill_mem,db_in(4),clk,reset,'0',ena_fill_mem_CE); ena_fill_mem_CE <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND NOT add(1) AND NOT mem_done);
db_out(0) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(0)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(0)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
NOT add(1) AND mword_count(16))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(0))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(0))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
add(1) AND mem_pointer_p(16))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_mem_fifo_p));
FDCPE_mem_pointer_p0: FDCPE port map (mem_pointer_p(0),mem_pointer_p_D(0),clk,reset,'0','1'); mem_pointer_p_D(0) <= ((db_in(0) AND _n0111) OR (N_PZ_1161 AND mem_pointer_p(0) AND NOT N_PZ_1138) OR (NOT N_PZ_1265 AND mem_pointer_p(0) AND NOT N_PZ_1138)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT N_PZ_1138)
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND add(1) AND NOT db_in(2) AND mem_pointer_p(0)));
_n0111 <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND enw AND cs AND NOT add(1));
N_PZ_1138 <= ((_n0111) OR (NOT state_FFD2 AND state_FFD1 AND NOT state_FFD3) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND add(1)));
FDCPE_mem_pointer_p16: FDCPE port map (mem_pointer_p(16),mem_pointer_p_D(16),clk,reset,'0','1'); mem_pointer_p_D(16) <= NOT (((NOT _n0111 AND N_PZ_1138 AND NOT SFDecomp_73) OR (NOT SFDecomp_73 AND NOT N_PZ_1215 AND NOT mem_pointer_p(16)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT _n0111 AND NOT SFDecomp_73 AND NOT mem_pointer_p(3) AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
mem_pointer_p(11) AND mem_pointer_p(12) AND mem_pointer_p(13) AND
mem_pointer_p(14) AND mem_pointer_p(15) AND mem_pointer_p(16))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT _n0111 AND NOT SFDecomp_73 AND
NOT mem_pointer_p(1) AND NOT mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT _n0111 AND NOT SFDecomp_73 AND
NOT mem_pointer_p(2) AND NOT mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT _n0111 AND NOT SFDecomp_73 AND mem_pointer_p(1) AND
mem_pointer_p(2) AND mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16))));
SFDecomp_73 <= (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND add(1) AND db_in(0) AND NOT db_in(2));
FDCPE_mem_pointer_p1: FDCPE port map (mem_pointer_p(1),mem_pointer_p_D(1),clk,reset,'0','1'); mem_pointer_p_D(1) <= ((db_in(1) AND _n0111) OR (N_PZ_1161 AND NOT N_PZ_1138 AND mem_pointer_p(1)) OR (NOT N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(1))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND NOT mem_pointer_p(1))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND add(1) AND NOT db_in(2) AND mem_pointer_p(1)));
FDCPE_mem_pointer_p2: FDCPE port map (mem_pointer_p(2),mem_pointer_p_D(2),clk,reset,'0','1'); mem_pointer_p_D(2) <= ((db_in(2) AND _n0111) OR (N_PZ_1161 AND NOT N_PZ_1138 AND mem_pointer_p(2)) OR (NOT N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(2))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(2))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(1) AND mem_pointer_p(2))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND NOT mem_pointer_p(2))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND add(1) AND NOT db_in(2) AND mem_pointer_p(2)));
FDCPE_mem_pointer_p3: FDCPE port map (mem_pointer_p(3),mem_pointer_p_D(3),clk,reset,'0','1'); mem_pointer_p_D(3) <= ((db_in(3) AND _n0111) OR (N_PZ_1161 AND NOT N_PZ_1138 AND mem_pointer_p(3)) OR (NOT N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(1) AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(2) AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
NOT mem_pointer_p(3))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND add(1) AND NOT db_in(2) AND mem_pointer_p(3)));
FDCPE_mem_pointer_p8: FDCPE port map (mem_pointer_p(8),mem_pointer_p_D(8),clk,reset,'0','1'); mem_pointer_p_D(8) <= ((db_in(8) AND _n0111) OR (mem_pointer_p(8) AND N_PZ_1252) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(8) AND NOT N_PZ_1156)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(8) AND N_PZ_1156));
N_PZ_1156 <= ((N_PZ_1161 AND mem_pointer_p(5) AND mem_pointer_p(6) AND mem_pointer_p(7)) OR (NOT N_PZ_1265 AND mem_pointer_p(5) AND mem_pointer_p(6) AND mem_pointer_p(7)) OR (N_PZ_1138 AND mem_pointer_p(5) AND mem_pointer_p(6) AND
mem_pointer_p(7))
OR (mem_pointer_p(0) AND mem_pointer_p(1) AND
mem_pointer_p(2) AND mem_pointer_p(3) AND mem_pointer_p(4) AND
mem_pointer_p(5) AND mem_pointer_p(6) AND mem_pointer_p(7)));
FDCPE_mem_pointer_p4: FDCPE port map (mem_pointer_p(4),mem_pointer_p_D(4),clk,reset,'0','1'); mem_pointer_p_D(4) <= ((db_in(4) AND _n0111) OR (mem_pointer_p(4) AND N_PZ_1252) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(3) AND mem_pointer_p(4))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
mem_pointer_p(3) AND NOT mem_pointer_p(4)));
N_PZ_1252 <= ((N_PZ_1161 AND NOT N_PZ_1138) OR (NOT N_PZ_1265 AND NOT N_PZ_1138) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND NOT N_PZ_1138 AND mem_pointer_p(3)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(1) AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(2) AND mem_pointer_p(3))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
NOT mem_pointer_p(3))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
enw AND cs AND add(1) AND NOT db_in(2)));
FDCPE_mem_pointer_p5: FDCPE port map (mem_pointer_p(5),mem_pointer_p_D(5),clk,reset,'0','1'); mem_pointer_p_D(5) <= ((db_in(5) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(5)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(3) AND mem_pointer_p(5))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(4) AND mem_pointer_p(5))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
mem_pointer_p(3) AND mem_pointer_p(4) AND NOT mem_pointer_p(5)));
FDCPE_mem_pointer_p6: FDCPE port map (mem_pointer_p(6),mem_pointer_p_D(6),clk,reset,'0','1'); mem_pointer_p_D(6) <= ((db_in(6) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(6)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(3) AND mem_pointer_p(6))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(4) AND mem_pointer_p(6))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(5) AND mem_pointer_p(6))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
mem_pointer_p(3) AND mem_pointer_p(4) AND mem_pointer_p(5) AND
NOT mem_pointer_p(6)));
FDCPE_mem_pointer_p7: FDCPE port map (mem_pointer_p(7),mem_pointer_p_D(7),clk,reset,'0','1'); mem_pointer_p_D(7) <= ((db_in(7) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(7)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(7))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT N_PZ_1138 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
mem_pointer_p(3) AND NOT N_PZ_1156 AND mem_pointer_p(4) AND mem_pointer_p(5) AND
mem_pointer_p(6)));
FDCPE_mem_pointer_p9: FDCPE port map (mem_pointer_p(9),mem_pointer_p_D(9),clk,reset,'0','1'); mem_pointer_p_D(9) <= ((db_in(9) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(9)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(9))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(9))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND NOT mem_pointer_p(9)));
FDCPE_mem_pointer_p10: FDCPE port map (mem_pointer_p(10),mem_pointer_p_D(10),clk,reset,'0','1'); mem_pointer_p_D(10) <= ((db_in(10) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(10)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(10))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(10))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(9) AND mem_pointer_p(10))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND NOT mem_pointer_p(10)));
FDCPE_mem_pointer_p11: FDCPE port map (mem_pointer_p(11),mem_pointer_p_D(11),clk,reset,'0','1'); mem_pointer_p_D(11) <= ((db_in(11) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(11)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(11))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(11))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(9) AND mem_pointer_p(11))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(10) AND mem_pointer_p(11))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
NOT mem_pointer_p(11)));
FDCPE_mem_pointer_p12: FDCPE port map (mem_pointer_p(12),mem_pointer_p_D(12),clk,reset,'0','1'); mem_pointer_p_D(12) <= ((db_in(12) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(12)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(12))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(12))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(9) AND mem_pointer_p(12))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(10) AND mem_pointer_p(12))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(11) AND mem_pointer_p(12))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
mem_pointer_p(11) AND NOT mem_pointer_p(12)));
FDCPE_mem_pointer_p13: FDCPE port map (mem_pointer_p(13),mem_pointer_p_D(13),clk,reset,'0','1'); mem_pointer_p_D(13) <= ((db_in(13) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(13)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(9) AND mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(10) AND mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(11) AND mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(12) AND mem_pointer_p(13))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
mem_pointer_p(11) AND mem_pointer_p(12) AND NOT mem_pointer_p(13)));
FDCPE_mem_pointer_p14: FDCPE port map (mem_pointer_p(14),mem_pointer_p_D(14),clk,reset,'0','1'); mem_pointer_p_D(14) <= ((db_in(14) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(14)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT mem_pointer_p(8) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND NOT N_PZ_1156 AND
mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(9) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(10) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(11) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(12) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
NOT mem_pointer_p(13) AND mem_pointer_p(14))
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
mem_pointer_p(11) AND mem_pointer_p(12) AND mem_pointer_p(13) AND
NOT mem_pointer_p(14)));
FDCPE_mem_pointer_p15: FDCPE port map (mem_pointer_p(15),mem_pointer_p_D(15),clk,reset,'0','1'); mem_pointer_p_D(15) <= ((db_in(15) AND _n0111) OR (N_PZ_1252 AND mem_pointer_p(15)) OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(15) AND NOT N_PZ_1215)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND
mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND
mem_pointer_p(11) AND mem_pointer_p(12) AND mem_pointer_p(13) AND
mem_pointer_p(14) AND NOT N_PZ_1215));
N_PZ_1215 <= (NOT N_PZ_1161 AND N_PZ_1265 AND NOT N_PZ_1138 AND mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND mem_pointer_p(15));
db_out(10) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(10)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(10)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(10))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(10))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_lfsr(3)));
db_out(11) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(11)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(11)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(11))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(11)));
db_out(12) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(12)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(12)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(12))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(12)));
db_out(13) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(13)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(13)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(13))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(13)));
db_out(14) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(14)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(14)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(14))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(14)));
db_out(15) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(15)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(15)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(15))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(15)));
db_out(1) <= ((ena_fifo_mem_p AND NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND NOT add(1)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(1)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
add(1) AND num_cycles(1))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND
NOT add(1) AND mword_count(17))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(1))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(1))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
add(1) AND mem_pointer_p(17)));
FDCPE_mem_pointer_p17: FDCPE port map (mem_pointer_p(17),mem_pointer_p_D(17),clk,reset,'0','1'); mem_pointer_p_D(17) <= NOT (((NOT _n0111 AND N_PZ_1138 AND NOT SFDecomp_79) OR (NOT N_PZ_1215 AND NOT mem_pointer_p(17) AND NOT SFDecomp_79) OR (NOT mem_pointer_p(16) AND NOT mem_pointer_p(17) AND
NOT SFDecomp_79)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT mem_pointer_p(0) AND
NOT _n0111 AND NOT mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16) AND mem_pointer_p(17) AND
NOT SFDecomp_79)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT _n0111 AND
NOT mem_pointer_p(1) AND NOT mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16) AND mem_pointer_p(17) AND
NOT SFDecomp_79)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND NOT _n0111 AND
NOT mem_pointer_p(2) AND NOT mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND
mem_pointer_p(9) AND mem_pointer_p(10) AND mem_pointer_p(11) AND
mem_pointer_p(12) AND mem_pointer_p(13) AND mem_pointer_p(14) AND
mem_pointer_p(15) AND mem_pointer_p(16) AND mem_pointer_p(17) AND
NOT SFDecomp_79)
OR (NOT N_PZ_1161 AND N_PZ_1265 AND mem_pointer_p(0) AND
NOT _n0111 AND mem_pointer_p(1) AND mem_pointer_p(2) AND
mem_pointer_p(3) AND mem_pointer_p(8) AND N_PZ_1156 AND mem_pointer_p(9) AND
mem_pointer_p(10) AND mem_pointer_p(11) AND mem_pointer_p(12) AND
mem_pointer_p(13) AND mem_pointer_p(14) AND mem_pointer_p(15) AND
mem_pointer_p(16) AND mem_pointer_p(17) AND NOT SFDecomp_79)));
SFDecomp_79 <= (db_in(1) AND NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND enw AND cs AND add(1) AND NOT db_in(2));
db_out(2) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(2)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(2)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(2))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(2))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_word_count));
db_out(3) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(3)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(3)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(3))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(3))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_event_count));
db_out(4) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(4)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(4)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(4))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(4))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_fill_mem));
db_out(5) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(5)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(5)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(5))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(5))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_cycles));
db_out(6) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(6)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(6)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(6))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(6))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_random));
db_out(7) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(7)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(7)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(7))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(7))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_lfsr(0)));
db_out(8) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(8)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(8)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(8))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(8))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_lfsr(1)));
db_out(9) <= ((NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND add(0) AND NOT add(1) AND mevent_count(9)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND add(2) AND NOT add(0) AND add(1) AND num_cycles(9)) OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
add(1) AND mword_count(9))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND add(0) AND
NOT add(1) AND mem_pointer_p(9))
OR (NOT add(5) AND NOT add(4) AND NOT add(3) AND NOT add(2) AND NOT add(0) AND
NOT add(1) AND ena_lfsr(2)));
mem_done_p <= NOT ((NOT N_PZ_1161 AND NOT mem_done2));
Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); FDDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); FTDCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);